Development of the ICAANN; a low-powered, analog, neural signal processor

dc.contributor.advisorYoshida, Ken
dc.contributor.authorBertram, Michael J.
dc.contributor.otherBerbari, Edward
dc.contributor.otherSalama, Paul
dc.date.accessioned2017-11-21T20:28:18Z
dc.date.available2017-11-21T20:28:18Z
dc.date.issued2017
dc.degree.date2017en_US
dc.degree.disciplineBiomedical Engineering
dc.degree.grantorPurdue Universityen_US
dc.degree.levelM.S.en_US
dc.descriptionIndiana University-Purdue University Indianapolis (IUPUI)en_US
dc.description.abstractIn the world of neuroscience and neural engineering, there is a desire to understand the language of the nerves. This language is spoken in action potentials. But this requires the ability to discriminate and track single fiber action potentials. Electrodes today are able to discriminate single fibers firing, but a single action potential doesn't say much. What is needed is a way to decipher the patterns and modulations of these action potentials and develop them into something meaningful. This is where the process of spike sorting comes into play. However, current mobile digital signal processors cannot process the amount of information coming from the electrode arrays in real-time. This greatly limits the mobility and growth into markets such as bioeletric medicines or neuroprosthesis. However, a solution exists using analog computing technologies. This work sets out to optimize a configurable integrated chip through using machine learning techniques. Initially, this resolution was realized through a conductive foam sheet and the delta rule to identify single fiber action potentials. Eventually, using a machine learning technique known as back-propagation, the work extended to artificial neural networks to identify and classify single fiber action potentials. Once it was demonstrated that artificial neural networks were well suited for the classification tasks, design parameters were found to develop an integrated circuit chip, known as the D1503 or the Integrated Configurable Analog Artificial Neural Network (ICAANN). Finally, once this chip was realized \textit{in-silico}, it was tested and shown to behave similarly to the simulations on conduction foam.en_US
dc.identifier.doi10.7912/C2PM2M
dc.identifier.urihttps://hdl.handle.net/1805/14651
dc.identifier.urihttp://dx.doi.org/10.7912/C2/1359
dc.language.isoen_USen_US
dc.titleDevelopment of the ICAANN; a low-powered, analog, neural signal processoren_US
dc.typeThesis
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