Browsing by Subject "FinFET"

Now showing 1 - 3 of 3
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    Design of Ultra-Low Power FinFET Charge Pumps for Energy Harvesting Systems
    (2024-08) Atluri, Mohan Krishna; Rizkalla, Maher E.; King, Brian S.; Christopher, Lauren A.
    This work introduces an ultra-low-voltage charge pump for energy harvesters in biosensors. The unique aspect of the proposed charge pump is its two-level design, where the first stage elevates the voltage to a specific level, and the output voltage of this stage becomes the input voltage of the second stage. Using two levels reduces the number of stages in a charge pump and improves efficiency to get a higher voltage gain. In our measurements, this charge pump design could convert a low 85mV input voltage to a substantial 608.2mV output voltage, approximately 7.15 times the input voltage, while maintaining a load resistance of 7MΩ and a 29.5% conversion efficiency.
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    A Low Power FinFET Charge Pump For Energy Harvesting Applications
    (2020-05) Whittaker, Kyle; Rizkalla, Maher E.; Ytterdal, Trond; King, Brian S.
    With the growing popularity and use of devices under the great umbrella that is the Internet of Things (IoT), the need for devices that are smaller, faster, cheaper and require less power is at an all time high with no intentions of slowing down. This is why many current research efforts are very focused on energy harvesting. Energy harvesting is the process of storing energy from external and ambient sources and delivering a small amount of power to low power IoT devices such as wireless sensors or wearable electronics. A charge pumps is a circuit used to convert a power supply to a higher or lower voltage depending on the specific application. Charge pumps are generally seen in memory design as a verity of power supplies are required for the newer memory technologies. Charge pumps can be also be designed for low voltage operation and can convert a smaller energy harvesting voltage level output to one that may be needed for the IoT device to operate. In this work, an integrated FinFET (Field Effect Transistor) charge pump for low power energy harvesting applications is proposed. The design and analysis of this system was conducted using Cadence Virtuoso Schematic L-Editing, Analog Design Environment and Spectre Circuit Simulator tools using the 7nm FinFETs from the ASAP7 7nm PDK. The research conducted here takes advantage of some inherent characteristics that are present in FinFET technologies, including low body effects, and faster switching speeds, lower threshold voltage and lower power consumption. The lower threshold voltage of the FinFET is key to get great performance at lower supply voltages. The charge pump in this work is designed to pump a 150mV power supply, generated from an energy harvester, to a regulated 650mV, while supplying 1uA of load current, with a 20mV voltage ripple in steady state (SS) operation. At these conditions, the systems power consumption is 4.85uW and is 31.76% efficient. Under no loading conditions, the charge pump reaches SS operation in 50us, giving it the fastest rise time of the compared state of the art efforts mentioned in this work. The minimum power supply voltage for the system to function is 93mV where it gives a regulated output voltage of $25mV. FinFET technology continues to be a very popular design choice and even though it has been in production since Intel's Ivy-Bridge processor in 2012, it seems that very few efforts have been made to use the advantages of FinFETs for charge pump design. This work shows though simulation that FinFET charge pumps can match the performance of charge pumps implemented in other technologies and should be considered for low power designs such as energy harvesting.
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    Multi-Threshold Low Power-Delay Product Memory and Datapath Components Utilizing Advanced FinFET Technology Emphasizing the Reliability and Robustness
    (2020-12) Yadav, Avinash; Rizkalla, Maher E.; Ytterdal, Trond; Lee, John J.
    In this thesis, we investigated the 7 nm FinFET technology for its delay-power product performance. In our study, we explored the ASAP7 library from Arizona State University, developed in collaboration with ARM Holdings. The FinFET technology was chosen since it has a subthreshold slope of 60mV/decade that enables cells to function at 0.7V supply voltage at the nominal corner. An emphasis was focused on characterizing the Non-Ideal effects, delay variation, and power for the FinFET device. An exhaustive analysis of the INVx1 delay variation for different operating conditions was also included, to assess the robustness. The 7nm FinFET device was then employed into 6T SRAM cells and 16 function ALU. The SRAM cells were approached with advanced multi-corner stability evaluation. The system-level architecture of the ALU has demonstrated an ultra-low power system operating at 1 GHz clock frequency.