Anderson, EthanAbrar Jahin, S. M.Talukder, NiloyChu, YulLee, John J.2022-11-082022-11-082022-03Anderson, E., Abrar Jahin, S. M., Talukder, N., Chu, Y., & Lee, J. J. (2022). A Node-RED-Based MIPS-32 Processor Simulator. In P. Verma, C. Charan, X. Fernando, & S. Ganesan (Eds.), Advances in Data Computing, Communication and Security (Vol. 106, pp. 695–705). Springer Nature Singapore. https://doi.org/10.1007/978-981-16-8403-6_64https://hdl.handle.net/1805/30501Processor simulators are imperative tools that well facilitate the understanding of modern processors. Therefore, numerous attempts have been made to develop better simulators, and some of them have been very widely used. There exist several categories of such simulators in terms of simulation speed, cycle accuracy, functional validation, cache focus, multiprocessor target, behavioral visualization, and education purpose. Our recent study focuses on developing a simulator with the following objectives: (i) to help students understand the organization and operation of processor faster and (ii) to provide students with much easier ways to build their own simulators while learning. Along the study, this paper describes our recent development of a Node-RED-based MIPS-32 processor simulator. Its functionality includes 5-stage pipeline visualization, 2-phase clocking (i.e., mimicking master/slave behavior), various cache configuration, cache statistics visualization, operand forwarding for the resolution of data dependency, and branch prediction mechanisms. Our study demonstrates the feasibility of good simulator implementations using Node-RED.en-USPublisher PolicyNode-RED-based MIPS-325-stage pipeline visualizationbranch prediction mechanismsArticle